Investigation of the RTN Distribution of nanoscale MOS devices from subthreshold to on-state

This letter presents a numerical investigation of the statistical distribution of the random telegraph noise (RTN) amplitude in nanoscale MOS devices, focusing on the change of its main features when moving from the subthreshold to the on-state conduction regime. Results show that while the distribution can be well approximated by an exponential behavior in subthreshold, large deviations from this behavior appear when moving toward the on-state regime, despite a low probability exponential tail at high RTN amplitudes being preserved. The average value of the distribution is shown to keep an inverse proportionality to channel area, while the slope of the high-amplitude exponential tail changes its dependence on device width, length, and doping when moving from subthreshold to on-state

A Multi-Channel Low-Power System-on-Chip for in vivo NeuralSpike Recording

This paper reports a multi-channel neural spike recording system-on-chip (SoC) with digital data compression and wireless telemetry. The circuit consists of a 64-channel low-power low-noise analog front-end, a single 8-bit analog-todigital converter (ADC), followed by digital signal compression and transmission units. The 400-MHz transmitter employs a Manchester-Coded Frequency Shift Keying (MC-FSK) modulator with low modulation index. In this way a 1.25-Mbit/s data rate is delivered within a band of about 3 MHz. Compression of the raw data is implemented by detecting the action potentials (APs) and storing 20 samples for each spike waveform. The choice greatly improves data quality and allows single neuron identification. A larger than 10-m transmission range is reached with an overall power consumption of 17.2 mW. This figure translates into a power budget of 269 μW per channel, which is in line with the results in literature but allowing a larger transmission distance and more efficient wireless link bandwidth occupation. The implemented IC was mounted on a small and light printed circuit board to be used during neuroscience experiments with freely-behaving rats. Powered by 2 AAA batteries the system can work continuously for more than 100 hours allowing long-lasting neural spike recordings

Fundamental Power Limits of SAR and ΔΣ Analog-to-Digital Converters

This work aims at estimating and comparing the power limits of ΔΣ and charge-redistribution successiveapproximation register (CR-SAR) analog-to-digital converters (ADCs), in order to identify which topology is the most powerefficient for a target resolution. A power consumption model for mismatch-limited SAR ADCs and for discrete-time (DT) ΔΣ modulators is presented and validated against experimental data. SAR ADCs are found to be the best choice for low-to-medium resolutions, up to roughly 80 dB of dynamic range (DR). At high resolutions, on the other hand, ΔΣ modulators become more power-efficient. This is due to the intrinsic robustness of the ΔΣ modulation principle against circuit imperfections and nonidealities. Furthermore, a comparison of the area occupation of such topologies reveals that, at high resolutions and for a given dynamic range, ΔΣ ADCs result more area-efficient as well

A Multi-Channel Low-Power System-on-Chip for in Vivo Recording and Wireless Transmission of Neural Spikes

This paper reports a multi-channel neural spike recording system-on-chip with digital data compression and wireless telemetry. The circuit consists of 16 amplifiers, an analog time-division multiplexer, a single 8 bit analog-to-digital converter, a digital signal compression unit and a wireless transmitter. Although only 16 amplifiers are integrated in our current die version, the whole system is designed to work with 64, demonstrating the feasibility of a digital processing and narrowband wireless transmission of 64 neural recording channels. Compression of the raw data is achieved by detecting the action potentials (APs) and storing 20 samples for each spike waveform. This compression method retains sufficiently high data quality to allow for single neuron identification (spike sorting). The 400 MHz transmitter employs a Manchester-Coded Frequency Shift Keying (MC-FSK) modulator with low modulation index. In this way, a 1.25 Mbit/s data rate is delivered within a limited band of about 3 MHz. The chip is realized in a 0.35 um AMS CMOS process featuring a 3 V power supply with an area of 3.1x 2.7 mm2. The achieved transmission range is over 10 m with an overall power consumption for 64 channels of 17.2 mW. This figure translates into a power budget of 269uW per channel, in line with published results but allowing a larger transmission distance and more efficient bandwidth occupation of the wireless link. The integrated circuit was mounted on a small and light board to be used during neuroscience experiments with freely-behaving rats. Powered by 2 AAA batteries, the system can continuously work for more than 100 hours allowing for long-lasting neural spike recordings

A new physics-based model for TANOS memories program/erase

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Solid-state photon detectors for optical fiber testing and laser ranging

IEEE Cat. Number 87CH2390-3 - ISBN Number 0-936659-69-6

A fast and accurate simulation method of impulse sensitivity function in oscillators

This paper presents a novel and simple simulation method to evaluate the impulse phase response of an oscillator. The technique, based on the linear-time variant (LTV) analysis of oscillators, computes the phase response in the frequency domain. It can be performed by means of periodic steady-state (PSS) and periodic transfer function (PXF) simulations available in commercial simulators (Spectre, Eldo, etc.). This method overwhelms the classical simulation method based on transient analysis and injection of charge pulses along the oscillator period in terms of both speed and precision. The good accuracy of the frequency domain method has been verified in two practical case studies, evaluating the 1/f3 phase noise in a classical Van der Pol oscillator and estimating the injection locking range in a ring oscillator-based frequency divider